Documentation

I have put here together copies of some documents pertaining to the original CoBra project.

Aside from that, some documents about the particular case of my activity building this computer, back in the day (1990-1996). More precisely, during that time I built two CoBra mainboards and their floppy disk interfaces. The first one I built was grey (no solder mask applied, the bare board only has the tracks solder-coated). Afterwards I built the second board, which is green due to the solder mask applied from the factory. From here on I will name them "the grey mainboard" and "the green mainboard".

The grey mainboard	The green mainboard

All these together are the documents I started this project from, at the end of 2009, and which are the basis of all subsequent developments.

Aside from all the above, I have also included here a section with documents useful in the study of this computer (though some have no connection with it, but might possibly interest the hobbyists), like datasheets for various integrated circuits (TTL, memories, the Z80 CPU and peripherals, OEM documentation about CP/M and so forth. This section will be updated as I find or scan new documents.

1. Original documents (old):

Black/White images of the original dual-layer CoBra mainboard (2 images for the two sides), courtesy of Roelof Koning from Holland
The original CoBra hardware manual (cover + 70 pages scanned at my request by Roelof Koning)
The original CoBra CP/M manual - photocopy from the Romanian Home Computer forum on Yahoo
An interesting document, apparently typed back in the day on a typewriter, named, I guess, "Introducing Cobra". This document is taken from the Romanian Home Computer forum on Yahoo.
The user manual for OPUS (OPerating User System), a system for software development, written by Dieter Porr, a Romanian software engineer born in the town of Cristian, province of Brasov. A remarkable person, who as far as I learned ended up a software engineer in Germany.

The two images of the ORIGINAL mainboard, along with the ORIGINAL hardware manual scanned are basically the most important starting points, which allowed me to begin this project with high chances of success. Therefore I will take this opportunity to give a very special thanks to Roelof Koning from Holland for these critical pieces of information. I asked him to scan - especially for me - the copy of the original hardware manual he owns, grayscale at 300 dpi. This allowed me a full reproduction of all information in it. Without these two pieces of information I don't think I could have easily get to what you can see today on this website.

In order to get to a correct conclusion by logical means, I decided to follow a double path:

Digitization of the original mainboard layout and
Digitization of the original schematics

followed by a result comparison. So:

I took the images of the original mainboard layout and used them as background to MANUALLY draw the mainboard in pcb.
Separately, I took the schematics in the original hardware manual and I entered them in gschem.

After all this I did a comparison between the connection lists resulted from these two processes.

Then I analyzed all the modifications visible on both my old mainboards I had built back in the '90s.

The result of all this was the list of mainboard modifications shown here and the FUNCTIONAL version of the original CoBra project (Version 0). This entire process took about two and a half years, during which I also had to keep a job to make a living and I also was fortunate enough to run into some serious health issues.

2. Documents pertaining to and resulted from the analysis of a CoBra mainboard I have assembled back in the '90s:

A graphic map, based on the two images of the original mainboard, showing in detail tracks that have been cut and modified
A list of these cuts and rewirings and their meanings
The schematics of two little extra modules used in conjunction with the modifications described above
The printed circuit board layouts for these modules (they were connected with wires to various points on the mainboard, according to the labels on the PCB layouts shown here)

3. Various schematics and notes copied from or given by various people in the '90s (scanned):

The 64K RAM modification (one bank of 64Kx1bit memory chips instead of three banks of 16Kx1bit memory chips), drew for me by my friend Dan Teodorescu.
The 80K RAM modification
The modification for 80 chars per line in CP/M
The memory map for the 80K RAM modification
The pinout for a few integrated circuits
The schematic for a PAL coder using four TTL circuits and a crystal. In my opinion, an interesting design. Unfortunately I don't know who invented it, but if somebody reading this knows the person, I would be glad to mention their name(s) here.

4. Documents re-edited by me in a decent format:

The original CoBra hardware manual, translated in English, in PDF format.
The original CoBra Basic manual, restored from an old photocopy, in PDF format. The photocopy was made for me by Emil Treuer, back then also a student like me, at the Traian Vuia Polytech Institute in Timisoara, sometime between 1988-1990.
The original CoBra CP/M manual, restored from the photocopy posted on the Romanian Home Computer forum on Yahoo, in PDF format.

5. Other documents not directly related to CoBra:

Datasheets of the TTL logic family
Russian TTL equivalents
Manufacturer (Zilog) documentation for the Z80 family of circuits (Z80CPU, Z80DMA, Z80CTC, Z80PIO, Z80SIO) and for some Intel circuits (the 8212 I/O port manufactured by National Semiconductor, AMD and Texas Instruments, the 8255 parallel programmable interface manufactured by Intel, AMD, NEC and Intersil and the 8272A floppy disk controller manufactured by Intel and UMC)
Documentation/user manuals pertaining to the CP/M operating system:

1. Original documents:

The original CoBra mainboard printed circuit (dual layer), courtesy of Roelof Koning

Component side, seen from the components:

The bottom (opposite side), seen from the bottom:

The original CoBra hardware manual scanned, courtesy of Roelof Koning		The original CoBra CP/M manual - photocopy

"Introducing CoBra"	"OPUS User Manual"

2. Documents pertaining to and resulted from the analysis of a CoBra mainboard I assembled back in the '90s:

Next, two graphic maps with modifications (one map for each side of the original mainboard printed circuit) and a list of these modifications (cuts and rewirings) resulted from the analysis of the green mainboard I had built in 1991-93 featuring the 80KB RAM modification, the 80 char/line CP/M modification, R/W access in the Basic RAM area for a Basic with a NMI routine, button added for reset to the startup config (COBRA RESET) and NMI button. These two maps contain a graphic image of all track cuts and rewirings explained in the list. Please note these modifications worked in conjunction with two little extra modules containing the 80KB RAM modification and the 80 char/line CP/M modification plus a few more little improvements. The schematics for these modules as well as the printed circuits are shown after the list of modifications, they were connected by wires to various points on the mainboard, according to the labels on the printed circuits.

Mainboard modifications, side 1 (component side):

Mainboard modifications, side 2 (bottom side):

List of connection changes for the original mainboard:

Schematics for the two extra modules:

These are two little circuits built by me and attached to the mainboard by wires, containing basically the 80KB RAM modification, the 80 char/line CP/M modification, a NMI signal generator controlled by a push button, and a few more little improvements. Please note this is about the particular case of my own constructive solution with the lousy means I had at the time. Not exactly a high-end piece of work (actually crappy in my opinion) but that's what I could do at that moment.

Module #1 printed circuit:

Module #2 printed circuit:

3. Miscellaneous schematics and notes acquired from various people at that time (scanned):

The 64K modification:	The 80K modification:

The 80 char/line CP/M modification: in the upper right corner there's the initial idea of this circuit (1 switch + 6 diodes) which was given to me by somebody else. Next dowb there's an implementation using two switches and AND gates, at the very bottom there's the final implementation, software activated through the O5 signal (bit 5 of output port FEh). This modification requires a modified CP/M system.	Memory map for the 80K RAM configuration (the 80K RAM modification):

Pinouts for a few integrated circuits:	PAL coder using TTL circuits:

4. Documents re-edited by me in a decent format:

NOTA: The Basic and CP/M manuals are for now not translated yet, and the hardware manual is still missing pages 64-70 with component placement on the power source printed circuit board, the RGB monitor interface and component placement on the mainboard. These things are still on my to-do list, and I will do them too when I find the time.

The original CoBra hardware manual	The original CoBra Basic manual (not translated to English yet)	The original CP/M CoBra manual (not translated to English yet)

5.1 7400 Series TTL Datasheets:

7400	Quadruple 2-input positive-NAND gates
7402	Quadruple 2-input positive-NOR gates
7403	Quadruple 2-input positive-NAND gates with open-collector outputs
7404	Hex inverters
7405	Hex inverters with open-collector outputs
7406	Hex inverter buffers/drivers with open-collector high-voltage outputs
7407	Hex buffers/drivers with open-collector high-voltage outputs
7408	Quadruple 2-input positive-AND gates
7409	Quadruple 2-input positive-AND gates with open-collector outputs
7410	Triple 3-input positive-NAND gates
7411	Triple 3-input positive-AND gates
7412	Triple 3-input positive-NAND gates with open-collector outputs
7413	Dual 4-input positive-NAND Schmitt triggers
7414	Hex Schmitt-trigger inverters
7415	Triple 3-input positive-AND gates with open-collector outputs
7416	Hex inverter buffers/drivers with open-collector high-voltage outputs (15V)
7417	Hex buffers/drivers with open-collector high-voltage outputs (15V)
7419	Schmitt-trigger positive-NAND gates and inverters with totem-pole outputs
7420	Dual 4-input positive-NAND gates
7421	Dual 4-input positive-AND gates
7424	Schmitt-trigger positive-NAND gates and inverters with totem-pole outputs
7426	Quadruple 2-input high-voltage interface positive-NAND gates
7427	Triple 3-input positive-NOR gates
7430	8-input positive-NAND gate
7431	Delay elements
7432	Quadruple 2-input positive-OR gates
7433	Quadruple 2-input positive-NOR buffers with open-collector outputs
7437	Quadruple 2-input positive-NAND buffers
7438	Quadruple 2-input positive-NAND buffers with open-collector outputs
7442	4-line BCD to 10-line decimal decoders
7446	BCD-to-seven-segment decoders/drivers with open collector outputs
7447	BCD-to-seven-segment decoders/drivers with open collector outputs
7448	BCD-to-seven-segment decoders/drivers with internal pull-ups
7449	BCD-to-seven-segment decoders/drivers with open collector outputs and blanking input
7451	AND-OR-INVERT gates
7473	Dual J-K flip-flops with CLEAR
7474	Dual D-type positive-edge-triggered flip-flops with PRESET and CLEAR
7475	4-bit bistable latches
7477	4-bit bistable latches
7485	4-bit magnitude comparators
7486	Quadruple 2-input Exclusive-OR gates
7490	Decade counters
7492	Divide-by-twelve counters
7493	4-bit binary counters
7495	4-bit parallel access shift registers
74107	Dual J-K flip-flops with CLEAR
74109	Dual J-K positive-edge-triggered flip-flops with PRESET and CLEAR
74112	Dual J-K negative-edge-triggered flip-flops with PRESET and CLEAR
74122	Retriggerable monostable multivibrators
74123	Retriggerable monostable multivibrators
74125	Quadruple bus buffers with 3-state outputs and ENABLE inputs
74126	Quadruple bus buffers with 3-state outputs and ENABLE inputs
74130	Retriggerable monostable multivibrators
74132	Quadruple 2-input positive-NAND Schmitt triggers
74136	Quadruple 2-input Exclusive-OR gates with open-collector outputs
74138	3-line to 8-line decoders/demultiplexers
74139	Dual 2-line to 4-line decoders/demultipliers
74145	BCD-to-decimal decoders/drivers
74147	10-line decimal to 4-line BCD priority encoder
74148	8-line to 3-line binary (octal) priority encoder
74150	16 to 1 selector/multiplexer
74151	8 to 1 selector/multiplexer
74153	Dual 4-line to 1-line data selector/multiplexer
74155	Dual 2-line to 4-line decoder/demultiplexer
74156	Dual 2-line to 4-line decoder/demultiplexer with open-collector outputs
74157	Quadruple 2-line to 1-line data selectors/multiplexers
74158	Quadruple 2-line to 1-line data selectors/multiplexers with inverted outputs
74160	Synchronous 4-bit decade counter with asynchronous CLEAR input
74161	Synchronous 4-bit binary counter with asynchronous CLEAR input
74162	Synchronous 4-bit decade counter with synchronous CLEAR input
74163	Synchronous 4-bit binary counter with synchronous CLEAR input
74164	8-bit serial-in parallel-out shift register
74165	8-bit parallel-in serial-out shift register
74166	8-bit parallel/serial-in serial-out shift register
74169	Synchronous 4-bit up/down binary counter
74173	4-bit D-type register with 3-state outputs
74174	Hex D-type flip-flops with asynchronous CLEAR
74175	Quadruple D-type flip-flops with asynchronous CLEAR and complementary outputs
74181	Arithmetic logic unit/function generator
74190	Synchronous BCD up/down counter
74191	Synchronous binary up/down counter
74192	Synchronous BCD up/down counter (dual clock with CLEAR)
74193	Synchronous binary up/down counter (dual clock with CLEAR)
74194	4-bit bidirectional universal shift register
74221	2 monostabili/multivibratori cu intrari TRIGGER-SCHMITT
74240	8 buffere si drivere de linie cu iesiri tri-state
74241	8 buffere si drivere de linie cu iesiri tri-state
74243	4 transceivere de magistrala, asincrone bidirectionale
74244	8 buffere si drivere de linie cu iesiri tri-state
74245	8 transceivere de magistrala, asincrone bidirectionale cu iesiri tri-state
74246	Decodor/driver de la BCD la sapte segmente cu iesiri cu colector in gol (30V)
74247	Decodor/driver de la BCD la sapte segmente cu iesiri cu colector in gol (15V)
74248	Decodor/driver de la BCD la sapte segmente cu iesiri cu colector in gol si rezistori pullup interni (5.5V)
74251	Multiplexor 8:1 cu iesiri tri-state
74253	2 multiplexoare 4:1 cu iesiri tri-state
74257	4 multiplexoare 2:1 cu iesiri tri-state
74258	4 multiplexoare 2:1 cu iesiri tri-state negate
74259	Latch adresabil pe 8 biti
74266	4 porti SAU-EXCLUSIV-NU cu iesiri cu colector in gol
74273	8 bistabili tip D cu stergere asincrona
74279	4 latch-uri S-R
74280	Generator/verificator de paritate pe 9 biti
74283	Sumator pe 4 biti cu bit de carry rapid
74290	Numarator decadic pe 4 biti
74292	Divizor programabil de frecventa / cronometru digital
74293	Numarator pe 4 biti
74294	Divizor programabil de frecventa / cronometru digital
74295	Registru de deplasare stinga/dreapta pe 4 biti cu iesiri tri-state
74298	4 multiplexoare 2:1 cu stocare
74299	Registru universal de deplasare/stocare pe 8 biti cu iesiri tri-state si stergere asincrona
74348	Codor cu prioritate de la 8 la 3 linii cu iesiri tri-state
74365	6 drivere de magistrala cu iesiri tri-state
74366	6 drivere de magistrala cu iesiri tri-state negate
74367	6 drivere de magistrala cu iesiri tri-state
74368	6 drivere de magistrala cu iesiri tri-state negate
74373	8 latch-uri tip D transparente cu iesiri tri-state
74374	8 bistabili tip D cu actionare pe front si iesiri tri-state
74375	Latch bistabil pe 4 biti
74377	8 bistabili cu cite o singura iesire
74378	6 bistabili cu cite o singura iesire
74379	4 bistabili cu cite doua iesiri (complementare)
74390	2 numaratoare decadice
74393	2 numaratoare pe 4 biti
74399	4 multiplexoare 2:1 cu stocare
74422	Monostabil multivibrator retriggerabil cu rezistor de temporizare intern
74423	Monostabil multivibrator retriggerabil
74440	4 transceivere de magistrala tridirectionale cu iesiri cu colector in gol
74441	4 transceivere de magistrala tridirectionale cu iesiri cu colector in gol negate
74442	4 transceivere de magistrala tridirectionale cu iesiri tri-state
74444	4 transceivere de magistrala tridirectionale cu iesiri tri-state adevarate si negate
74465	8 buffere cu iesiri tri-state cu validare comuna
74466	8 buffere cu iesiri tri-state cu validare comuna si iesiri negate
74467	8 buffere cu iesiri tri-state cu validari separate pe grupuri de 4
74468	8 buffere cu iesiri tri-state cu validari separate pe grupuri de 4 si iesiri negate
74540	8 buffere si drivere de linie cu iesiri tri-state negate
74541	8 buffere si drivere de linie cu iesiri tri-state
74592	Numarator binar pe 8 biti cu registru de intrare paralel
74593	Numarator binar pe 8 biti cu registru de intrare paralel si intrari/iesiri tri-state
74594	Registru de deplasare pe 8 biti cu latch buffer la iesire
74595	Registru de deplasare pe 8 biti cu latch tri-state la iesire
74596	Registru de deplasare pe 8 biti cu latch cu colector in gol la iesire
74597	Registru de deplasare pe 8 biti cu latch la intrare
74598	Registru de deplasare pe 8 biti cu latch la intrare si intrari/iesiri tri-state
74599	Registru de deplasare pe 8 biti cu latch la iesire si iesiri cu colector in gol
74620	8 transceivere de magistrala bidirectionale cu iesiri tri-state negate
74621	8 transceivere de magistrala bidirectionale cu iesiri cu colector in gol
74623	8 transceivere de magistrala bidirectionale cu iesiri tri-state
74640	8 transceivere de magistrala bidirectionale cu iesiri tri-state negate
74641	8 transceivere de magistrala bidirectionale cu iesiri cu colector in gol
74642	8 transceivere de magistrala bidirectionale cu iesiri cu colector in gol negate
74644	8 transceivere de magistrala bidirectionale cu iesiri cu colector in gol adevarate si negate
74645	8 transceivere de magistrala bidirectionale cu iesiri tri-state
74646	8 transceivere si registre de magistrala cu iesiri tri-state
74647	8 transceivere si registre de magistrala cu iesiri cu colector in gol
74648	8 transceivere si registre de magistrala cu iesiri tri-state negate
74649	8 transceivere si registre de magistrala cu iesiri cu colector in gol negate
74651	8 transceivere si registre de magistrala cu iesiri tri-state negate
74652	8 transceivere si registre de magistrala cu iesiri tri-state
74653	8 transceivere si registre de magistrala cu iesiri negate tri-state si cu colector in gol
74668	Numarator bidirectional sincron pe 4 biti decadic
74669	Numarator bidirectional sincron pe 4 biti
74670	4 registri de cite 4 biti cu iesiri tri-state
74673	Registru de deplasare pe 16 biti cu intrare/iesire seriala si registru de stocare cu iesiri paralele
74674	Registru de deplasare pe 16 biti cu intrari paralele si iesire seriala
74682	Comparator de egalitate cu magnitudine de 8 biti cu rezistori pullup de 20 kΩ la iesiri
74684	Comparator de egalitate cu magnitudine de 8 biti
74685	Comparator de egalitate cu magnitudine de 8 biti cu iesiri cu colector in gol
74686	Comparator de egalitate cu magnitudine de 8 biti cu output enable
74687	Comparator de egalitate cu magnitudine de 8 biti cu output enable si iesiri cu colector in gol
74688	Comparator de egalitate cu magnitudine de 8 biti cu output enable
74696	Numarator decadic bidirectional sincron cu registru de iesire si iesiri tri-state multiplexate, cu stergere asincrona
74697	Numarator binar bidirectional sincron cu registru de iesire si iesiri tri-state multiplexate, cu stergere asincrona
74699	Numarator binar bidirectional sincron cu registru de iesire si iesiri tri-state multiplexate, cu stergere sincrona

5.2 Russian TTL equivalents:

The Soviet Union started manufacturing TTL ICs with 7400 series pin-out in late 1960s and early 1970s. Part numbering is different from the Western series.

A component name had two parts: a prefix and a suffix.
The technology modifications were considered different series, and were identified by different numbered prefixes:
- prefix 155 indicates the plain TTL series (74nn, 74nnn)
- prefix 131 indicates the 74H series
- prefix 158 indicates the 74L series
- prefix 531 indicates the 74S series
- prefix 555 indicates the 74LS series
- prefix 1530 indicates the 74F series
- prefix 1531 indicates the 74AS series
- prefix 1533 indicates the 74ALS series
- prefix 1564 indicates the 74HC series
The function of the unit is described with the suffix - a two-letter code followed by a number
- The first letter represents the functional group - logical, triggers, counters, multiplexers, etc.
- The second letter shows the functional subgroup making the distinction between logical NAND and NOR, D- and JK-triggers, decimal and binary counters, etc.
- The number distinguishes variants with different number of inputs, or different number of elements within a die - ЛА1/ЛА2/ЛА3 (LA1/LA2/LA3) are 2 four-input / 1 eight-input / 4 two-input NAND elements respectively (equivalent to 7420/7430/7400).
Before July 1974 the two letters from the functional description were inserted after the first digit of the series. Examples: K1ЛА551 and K155ЛА1 (7420), K1TM552 and K155TM2 (7474) are the same ICs made at different times.

The function of the unit is described with the suffix, according to the table below:

American code	Russian suffix	American code	Russian suffix
7400	ЛА3	74140	ЛА6
7401	ЛА8	74141	ИД1
7402	ЛЕ1	74145	ИД10
7403	ЛА9	74148	ИВ1
7404	ЛН1	74150	КП1
7405	ЛН2	74151	КП7
7406	ЛН3	74152	КП5
7407	ЛН4	74153	КП2
7408	ЛИ1	74154	ИД3
7410	ЛА4	74155	ИД4
7411	ЛИ3	74160	ИЕ9
7412	ЛА10	74163	ИЕ10
7413	ТЛ1	74164	ИР8
7414	ТЛ2	74165	ИР9
7415	ЛИ4	74168	ИЕ16
7416	ЛН5	74169	ИЕ17
7417	ЛП4	74170	РП1
7420	ЛА1	74172	РП3
7421	ЛИ6	74173	ИР15
7422	ЛА7	74174	ТМ9
7423	ЛЕ2	74175	ТМ8
7425	ЛЕ3	74180	ИП2
7426	ЛА11	74181	ИП3
7427	ЛЕ4	74182	ИП4
7428	ЛЕ5	74184	ПР6
7430	ЛА2	74185	ПР7
7432	ЛЛ1	74192	ИЕ6
7434	ЛИ9	74193	ИЕ7
7437	ЛА12	74194	ИР11
7438	ЛА13	74195	ИР12
7440	ЛА6	74196	ИЕ14
7442	ИД6	74197	ИЕ15
7450	ЛР1	74198	ИР13
7451	ЛР11	74240	АП3
7453	ЛР3	74241	АП4
7454	ЛР13	74242	ИП6
7455	ЛР4	74243	ИП7
7460	ЛД1	74245	АП6
7464	ЛР9	74251	КП15
7465	ЛР10	74253	КП12
7472	ТВ1	74257	КП11
7474	ТМ2	74258	КП14
7475	ТМ7	74260	ЛЕ7
7477	ТМ5	74261	ИП8
7480	ИМ1	74279	ТР2
7481	РУ1	74283	ИМ6
7482	ИМ2	74295	ИР16
7483	ИМ3	74298	КП13
7485	СП1	74299	ИР24
7490	ИЕ2	74322	ИР28
7492	ИЕ4	74358	ИМ7
7493	ИЕ5	74366	ЛН6
7497	ИЕ8	74367	ЛП11
74107	ТВ6	74373	ИР22
74109	ТВ15	74374	ИР23
74112	ТВ9	74377	ИР27
74113	ТВ10	74381	ИК2
74114	ТВ11	74384	ИП9
74121	АГ1	74385	ИМ7
74123	АГ3	74395	ИР25
74124	ГГ1	74482	ВГ1
74125	ЛП8	74630	ВЖ1
74128	ЛЕ6	74670	ИР26
74132	ТЛ3	AM25S05	ИК1
74134	ЛА19	AM25S07	ИР18
74136	ЛЛ3	AM25S08	ИР19
74138	ИД7	AM25S09	ИР20
74139	ИД14	AM25S10	ИР21

Documentation

The grey mainboard

The green mainboard

The original CoBra mainboard printed circuit (dual layer), courtesy of Roelof Koning

Component side, seen from the components:

The bottom (opposite side), seen from the bottom:

The original CoBra hardware manual scanned,courtesy of Roelof Koning

The original CoBra CP/M manual - photocopy

"Introducing CoBra"

"OPUS User Manual"

Mainboard modifications, side 1 (component side):

Mainboard modifications, side 2 (bottom side):

List of connection changes for the original mainboard:

Schematics for the two extra modules:

Module #1 printed circuit:

Module #2 printed circuit:

The 64K modification:

The 80K modification:

The 80 char/line CP/M modification:

Memory map for the 80K RAM configuration (the 80K RAM modification):

Pinouts for a few integrated circuits:

PAL coder using TTL circuits:

The original CoBra hardware manual

The original CoBra Basic manual (not translated to English yet)

The original CP/M CoBra manual (not translated to English yet)

The original CoBra hardware manual scanned,
courtesy of Roelof Koning