In drafting stage

Mainboard - v.1.2


This is the documentation for an improved version of v.0, I called it "Version 1.2". The total addressable RAM memory is still 64KB, but a few improvements have been made over v.0. Basically, this version is the equivalent of the "64K modification", meaning instead of DRAM#0, DRAM#2 si DRAM#3 (48K in total) only one 64K memory bank is used (of which only 48K are addressable), but there are a few more improvements aside from that.

Changes from v.0:


Schematics - v.1.2

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Version 1.2 features:


  • 64KB total addressable RAM
  • 64KB DRAM as 8 x 4164 chips (64Kx1bit) or 2 x 41464 chips (64Kx4bit) or 1 x SRAM chip (128Kx8bit)
  • 16KB video RAM as 8 x 4164 chips (64Kx1bit) or 2 x 41464 chips (64Kx4bit) or 1 x SRAM chip (32Kx8bit)
  • 2-16KB BOOT ROM as 1 x EPROM chip (2716-27128) or 1 x EEPROM chip (29EE010, 128Kx8bit)
  • 16-64KB BASIC ROM as 1 x EPROM chip (27128-27512) or 1 x EEPROM chip (29EE010, 128Kx8bit)


Board layout - v.1.2

The component layer (above) is drawn in red and the opposite layer in blue.

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