In drafting stage

Mainboard - v.1.3

This is the documentation for an improved version of v.1.2, I called it "Version 1.3". The total addressable RAM memory is 80KB and there are a few improvements over v.1.2. basically, this version is the equivalent of the "80K modification", meaning instead of DRAM#0, DRAM#2 and DRAM#3 (48K in total) only one 64K memory bank is used (of which all 64K are addressable), and then the 16KB video RAM is also addressable. Aside from this there are a few more improvements.

Changes from v.1.2:

The total RAM memory installed is 80KB, addressable 100%. This is accomplished by the "80KB modification", a hardware modification in the "Configurator and selector circuit", "Dynamic memory circuit", "Video memory circuit" and described on the "Modifications" page of the schematics (see below).

NOTE: The video memory is only partially accessed, since the video controller only uses 1B00h (6912) bytes, which is less than half of the 4000h (16384 bytes) of the video memory bank. But, with the "80KB modification" (only in CP/M hardware configuration), the second half of the video memory bank is also used, so basically the entire RAM memory is addressed!
Another hardware modification is introduced - the "80 characters per line in CP/M" modification - described on the "Modifications" in schematics (see below). Using this and also a modified CP/M system, under the CP/M hardware configuration, the video memory is used to the maximum and the BORDER area left and right of the regular Spectrum SCREEN (256x192 pixeli) is taken over and reused for displaying an increased number of characters per line of text (80), while at the same time the characters used being half as wide. Thus, the effectively displayed area on the TV screen takes a wide aspect (only in text mode, under CP/M). The hardware modification is activated through software by the modified CP/M system, at boot time.
An extra reset button is added, for the NMI signal to the CPU, along with a dedicated circuit with 74193 to correctly generate the signal. This is normally used for "cracking" Spectrum games and then transferring them in CP/M executable format onto floppy disk.
A switch is added which (under BASIC hardware config) switches the BASIC memory area access mode from read-only to read/write. This is used when "cracking" a BASIC program, when basically 3 things are required:
- A NMI button to send the NMI signal to CPU;
- A NMI interrupt routine, which mainly has to save the whole intact 48KB RAM memory block above the BASIC area (user memory area)
- An extra R/W memory area where the NMI routine would save the contents of the CPU registers at the moment NMI is activated to the CPU. This area can only be chosen in the BASIC system memory area (0000-3FFF) that is the first 16KB RAM (where the BASIC system stored in EPROM is copied when the computer hardware configuration switches from startup (CoBra) to BASIC), hence the usefulness of a manual switch to transform the BASIC memory area in R/W area.
In conclusion we need a modified BASIC operating system, which would include an extra NMI routine somewhere in an unused BASIC area, and where also in some unused BASIC area the CPU registers would be saved.

Schematics - v.1.3

Version 1.3 features:

★ 80KB total addressable RAM

★ 64KB DRAM as 8 x 4164 chips (64Kx1bit) or 2 x 41464 chips (64Kx4bit) or 1 x SRAM chip (128Kx8bit)

★ 16KB video RAM as 8 x 4164 chips (64Kx1bit) or 2 x 41464 chips (64Kx4bit) or 1 x SRAM chip (32Kx8bit)

★ 2-16KB BOOT ROM as 1 x EPROM chip (2716-27128) or 1 x EEPROM chip (29EE010, 128Kx8bit)

★ 16-64KB BASIC ROM as 1 x EPROM chip (27128-27512) or 1 x EEPROM chip (29EE010, 128Kx8bit)

Board layout - v.1.3

The component layer (above) is drawn in red and the opposite layer in blue.