This page presents all information required to build the WORKING version of the original CoBra project, as described by the original hardware manual. Mistakes existing in the original documentation and on the original printed circuit board layout of the mainboard are listed and corrected here and then the completed and correct schematics are presented, drawn in gschem, as well as the working printed circuit board layout of the mainboard (the original version of the floppy disk interface is described on the floppy interface page). Aside from schematics and board layouts, there is also shown a memory map explained for the initial standard 64K RAM version. This is "Version 0" of the CoBra project, the closest WORKING form to the original described in the hardware manual.
Of course, the importance of this version is rather historical, but its existence constitute the basis for any subsequent development of a version achievable in our day with parts currently marketed.
In order to get to this version, starting from the original board layout some modifications have been applied, which are described on the previous page ("Documents") where I presented the graphic modification maps of the original mainboard layout and also a list of descriptions for connection changes represented on the map.
This list of connection changes pertains to the particular case of the mainboard I built back in the 90's and as such not all modifications listed are required in order to get the basic working version of CoBra.
The basic version described here (Version 0) has only 64KB RAM and no modifications. Critical for a correct operation are only those modifications having the last column in the table colored in red. Those with the last column in yellow are not critical but still affect the proper operation. These two categories are included în "Version 0" described here.
The modifications and corrections applied to the original schematics and board layout in this Version 0 are then as follows:
Diodes performing the BRIGHT function are added (holes added on mainboard)
U36/1 to U36/5 (wrong connection on board layout) has been corrected (cut #5 and connection #1 on side 2)
U79/10 to R87 (wrong connection on board layout) has been corrected (cut #20 and connection #18 on side 2)
U87/11 to R87 connection added (connection #20 on side 2)
U87/11 to U86/11 to R87 (wrong connection on board layout) has been corrected (cut #1 side 1)
Joystick Common to J6/8 conform manualului original (cut #5 and connection #1 side 1)
BA7 to JEXA/8 (wrong connection on board layout) has been corrected (cut #11 faţa 1 and connection #22 side 2)
R107 to GND (wrong connection on board layout) has been corrected (cut #13 faţa 1 and connection #19 side 2)
U85/12 to U87/13+12 (wrong connection on board layout) has been corrected (cut #24 and connection #21 side 2)
U85/13 to U80/3, U81/11 (wrong connection on board layout) has been corrected (cut #25 side 2)
U34/8 to JEXA/9 (missing connection on board layout) has been added (connection #24 side 2)
U83/6,7 to GND (missing connection on board layout) has been added (connection #25 side 2)
The main features of Version 0 (according also to the original hardware) are:
64 KB total DRAM memory (fully addressable), split in 4 banks of 8 chips each
DRAM memory chips used: 4116, 16K x 1bit memories using 3 voltages
16 KB total BASIC EPROM memory, split in 8 or 4 chips, user choice
EPROM BASIC memory chips used: 2716, 2K x 8bit memories (8-chip choice) or 2732, 4K x 8 bit memories (4-chip choice)
Between 2KB and 8KB BOOT EPROM memory, in one chip that can be 2716, 2732 or 2764.
*** NOTE: The computer can address up to 16KB BOOT EPROM memory, but on the original mainboard, just as in the original schematics, pin 26 of the BOOT EPROM chip (A13 address line to 27128) is connected to VCC, hence 27128 cannot be used at its full capacity (16KB) if we are to follow the original schematics. Obviously if we disconnect pin 26 from VCC and connect it to BA13 we can address 16KB BOOT EPROM, but for this a jumper or extra switch would be needed, because 2716 and 2732 have pin 24 (VCC) in place of pin 26 of 2764 or 27128, so for the (historical) purpose of this Version 0 I just stuck to the original schematics.
One RESET button only, only meant to be used in the BASIC or CP/M configurations (not in the startup configuration). There is no RESET button to put the computer back in the initial startup config.
Schematics - v.0
Version 0 features:
64KB RAM in 4 banks of 16KB each
DRAM used: 4116 (3 voltages)
16KB BASIC EPROM in 8 x 2716 chips or 4 x 2732 chips